YM2612 Registers

0x22 - LFO

Bit	7	6	5	4	3	2	1	0
Def	Unused				LFO Enable	LFO Frequency

Value	LFO Frequency
0	3.98
1	5.56
2	6.02
3	6.37
4	6.88
5	9.63
6	48.1
7	72.2

0x24/0x25 - Timer A

0x24

Bit	7	6	5	4	3	2	1	0
Def	Timer A (bit 10-2)

0x25

Bit	7	6	5	4	3	2	1	0
Def	Unused						Timer A (bit 1-0)

0x26 - Timer B

Bit	7	6	5	4	3	2	1	0
Def	Timer B

0x27 - Channel 3/6 and Timer control

Bit	7	6	5	4	3	2	1	0
Def	Channel 3 Mode 0 : Normal 1 : Special 2/3 : Illegal		1 : Timer B Reset 0 : No effect	1 : Timer A Reset 0 : No effect	1 : Timer B overflow set the read register flag 0 : Timer B overflow don't set the read register flag	1 : Timer A overflow set the read register flag 0 : Timer A overflow don't set the read register flag	1 : Start Timer B 0 : Stop Timer B	1 : Start Timer A 0 : Stop Timer A

0x28 - Channel Operator control

Bit	7	6	5	4	3	2	1	0
Def	Operator				Unused	Channel

0x2A/0x2B - DAC

0x2A

Bit	7	6	5	4	3	2	1	0
Def	DAC Data

0x2B

Bit	7	6	5	4	3	2	1	0
Def	1 : DAC Enable 0 : DAC Disable	Unused

0x30-0x90 - Single operator control

Each channel operators is configured with 7 registers.

Address	Part I	Part II
$x0	Channel 1 Operator 1	Channel 4 Operator 1
$x1	Channel 2 Operator 1	Channel 5 Operator 1
$x2	Channel 3 Operator 1	Channel 6 Operator 1
$x4	Channel 1 Operator 2	Channel 4 Operator 2
$x5	Channel 2 Operator 2	Channel 5 Operator 2
$x6	Channel 3 Operator 2	Channel 6 Operator 2
$x8	Channel 1 Operator 3	Channel 4 Operator 3
$x9	Channel 2 Operator 3	Channel 5 Operator 3
$xA	Channel 3 Operator 3	Channel 6 Operator 3
$xC	Channel 1 Operator 4	Channel 4 Operator 4
$xD	Channel 2 Operator 4	Channel 5 Operator 4
$xE	Channel 3 Operator 4	Channel 6 Operator 4

0x3x register

Bit	7	6	5	4	3	2	1	0
Def	Unused	DT1 (Detune)			MUL (Multiple)

MUL multiplies the overall frequency by it's value (except for the 0 value which multiply by 0.5)

DT1 gives small variations from the overall frequency x MUL.

Value	Multiplicative effect
0	No change
1	x(1 + E)
2	x(1 + 2E)
3	x(1 + 3E)
4	No change
5	x(1 - E)
6	x(1 - 2E)
7	x(1 - 3E)

0x4x register

Bit	7	6	5	4	3	2	1	0
Def	Unused	Total level (envelope's highest amplitude)

Value is between 0 (largest) and 127 (smallest)

A change of one unit is about 0.75dB

0x5x register

Bit	7	6	5	4	3	2	1	0
Def	RS (Rate scaling)		Unused	AR (Attack rate)

0x6x register

Bit	7	6	5	4	3	2	1	0
Def	AM (Amplitude modulation enable)	Unused		D1R (first decay rate)

0x7x register

Bit	7	6	5	4	3	2	1	0
Def	Unused			D2R

0x8x register

Bit	7	6	5	4	3	2	1	0
Def	D1L				RR

0x9x register

Bit	7	6	5	4	3	2	1	0
Def	Unused				SSG-EG

0xA0-0xB4 - Single channel control

Like the 0x30-0x90 range, each register is tripled.

Address	Part I	Part II
$x0	Channel 1	Channel 4
$x1	Channel 2	Channel 5
$x2	Channel 3	Channel 6

0xAx - Frequency

The frequency is a 14-bit number, high part must be written in 0xA4 first, then lower part to 0xA0.

The three highest bit give the octave. The ten others give the position in the octave.

If channel 3 is in special mode (see register 0x27), one can control each channel 3 operators.

Operator 1 frequency is in 0xA2/0xA6. Operator 2 frequency is in 0xA8/0xAC. Operator 3 frequency is in 0xA9/0xAD. Operator 4 frequency is in 0xAA/0xAE.

0xB0 - Feedback and Algorithm

Bit	7	6	5	4	3	2	1	0
Def	Unused		Feedback			Algorithm

0xB4 - Stereo and LFO

Bit	7	6	5	4	3	2	1	0
Def	Left	Right	AMS (Amplitude Modulation Sensitivity)		Unused	FMS (Frequency Modulation Sensitivity)

AMS Value	dB
0	0
1	1.4
2	5.9
3	11.8

FMS Value	% of a halftone
0	0
1	~3.4
2	~6.7
3	~10
4	~14
5	~20
6	~40
7	~80