VDP Ports: Difference between revisions

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(Created page with "=Data port= The Data port is at 0xC00000 or $C00002 and is used for reading/writing to the VRAM,CRAM or VSRAM. You first have to select the address and RAM using the [[VDP_P...")
 
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The Data port is at 0xC00000 or $C00002 and is used for reading/writing to the VRAM,CRAM or VSRAM.
The Data port is at 0xC00000 or $C00002 and is used for reading/writing to the VRAM,CRAM or VSRAM.


You first have to select the address and RAM using the [[VDP_Ports#Write_2_-_Setting_RAM_address|control port]].
You first have to select the address and RAM using the [[VDP_Ports#Control_Port|control port]].


{{16BitRegister
{{16BitRegister

Revision as of 16:53, 20 March 2012

Data port

The Data port is at 0xC00000 or $C00002 and is used for reading/writing to the VRAM,CRAM or VSRAM.

You first have to select the address and RAM using the control port.

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def D15-D0

Control Port

The control port is at $C00004 or $C00006 (only for writing).

Read

Reading it will get the status register.

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Nothing 0 :

1 : FIFO empty

0 :

1 : FIFO full

0 :

1 : V interrupt happened

0 : No sprites overflow

1 : Sprites overflow

0 : No collision

1 : Collision between two sprites

0 : Even frame

1 : Odd frame

(in interlace mode)

0 : Not in VBLANK

1 : In VBLANK

0 : Not in HBLANK

1 : In HBLANK

0 : DMA not busy

1 : DMA busy

0 : NTSC mode

1 : PAL mode

Writing to it can be done for setting registers or setting RAM address for further read/write.

Write 1 - Setting Register

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def always 1 always 0 Register number Register value

Write 2 - Setting RAM address

First word

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def CD1-CD0 A13-A0

Second word

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def 0 CD5-CD2 0 A15-A14

CD0-CD5 select the address mode.

Access mode CD5 CD4 CD3 CD2 CD1 CD0
VRAM Write 0 0 0 0 0 1
CRAM Write 0 0 0 0 1 1
VSRAM Write 0 0 0 1 0 1
VRAM Read 0 0 0 0 0 0
CRAM Read 0 0 1 0 0 0
VSRAM Read 0 0 0 1 0 0

CD4 and CD5 are used while doing DMA access.


HV Counter

The HV counter port is used to read the current line/frame drawn by the VDP.

Non interlace mode

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def Frame number Line number

Interlace mode

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Def VC7 VC6 VC5 VC4 VC3 VC2 VC1 VC8 Line number